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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Triple ECL to PECL Translator
The MC100LVEL/EL90 is a triple ECL to PECL translator. The device receives either standard or low voltage differential ECL signals and translates them to either standard or low voltage differential PECL output signals. The LVEL device can handle the low voltage signals while the EL device is designed for the standard signals. It is possible to have low voltage signals on one side and standard signals on the other if the LVEL90 is used.
MC100LVEL90 MC100EL90
* * * *
500ps Propagation Delays Fully Differential Design Supports both Standard and Low Voltage Operation 20-Lead SOIC Packaging
20 1
A VBB output is provided for interfacing with single ended ECL signals at the input. If a single ended input is to be used the VBB output should be connected to the D input. The active signal would then drive the D input. When used the VBB output should be bypassed to ground via a 0.01F capacitor. The VBB output is designed to act as the switching reference for the EL90 under single ended input switching conditions, as a result this pin can only source/sink up to 0.5mA of current. To accomplish the level translation the EL/LVEL90 requires three power rails. The VCC supply should be connected to the positive supply, and the VEE pin should be connected to the negative power supply. The GND pins as expected are connected to the system ground plain. Both VEE and VCC should be bypassed to ground via 0.01F capacitors. Under open input conditions, the D input will be biased at VEE/2 and the D input will be pulled to VEE. This condition will force the Q output to a LOW, ensuring stability.
DW SUFFIX PLASTIC SOIC PACKAGE CASE 751D-04
PIN NAMES
Pins Dn Qn VBB Function ECL Inputs PECL Outputs ECL Reference Voltage Output
Logic Diagram and Pinout: 20-Lead SOIC (Top View)
VCC 20 PECL Q0 19 Q0 18 GND 17 PECL Q1 16 Q1 15 GND 14 PECL Q2 13 Q2 12 VCC 11
ECL
ECL
ECL
1 VCC
2 D0
3 D0
4 VBB
5 D1
6 D1
7 VBB
8 D2
9 D2
10 VEE
7/95
(c) Motorola, Inc. 1996
4-1
REV 1
MC100LVEL90 MC100EL90
ECL INPUT DC CHARACTERISTICS
-40C Symbol
VEE IIH IIL VPP VIH VIL VBB IEE
0C Min
-4.2 -3.0
25C Max
-5.5 -3.8 150
85C Max
-5.5 -3.8 150
Characteristic
Power Supply Voltage Input HIGH Current Input LOW Current Minimum Peak-to-Peak Input1 Input HIGH Voltage Input LOW Voltage Reference Output Power Supply Current EL90 LVEL90
Min
-4.2 -3.0
Max
-5.5 -3.8 150
Min
-4.2 -3.0
Typ
Min
-4.2 -3.0
Max
-5.5 -3.8 150
Unit
V A A mV
Condition
0.5 150 -1165 -1810 -1.38 -880 -1475 -1.26 8.0
0.5 150 -1165 -1810 -1.38 -880 -1475 -1.26 8.0
0.5 150 -1165 -1810 -1.38 6.0 -880 -1475 -1.26 8.0
0.5 150 -1165 -1810 -1.38 -880 -1475 -1.26 8.0
V V V mA
1. 150mV input guarantees full logic swing at the output.
LVPECL OUTPUT DC CHARACTERISTICS
-40C Symbol VCC VOH VOL Characteristic Power Supply Voltage Output HIGH Voltage1 Output LOW Voltage1 Min 3.0 2.215 1.47 Max 3.8 2.42 1.745 24 Min 3.0 2.275 1.49 0C Max 3.8 2.42 1.68 24 Min 3.0 2.275 1.49 25C Typ 3.3 2.35 1.60 20 Max 3.8 2.42 1.68 24 85C Min 3.0 2.275 1.49 Max 3.8 2.42 1.68 26 Unit V V V mA VCC = 3.3V VCC = 3.3V Condition
IGND Power Supply Current 1. Levels will vary 1:1 with VCC.
PECL OUTPUT DC CHARACTERISTICS
-40C Symbol VCC VOH VOL Characteristic Power Supply Voltage Output HIGH Voltage1 Output LOW Voltage1 Min 4.75 3.915 3.17 Max 5.25 4.12 3.445 24 Min 4.75 3.975 3.19 0C Max 5.25 4.12 3.38 24 Min 4.75 3.975 3.19 4.05 3.30 20 25C Typ Max 5.25 4.12 3.38 24 85C Min 4.75 3.975 3.19 Max 5.25 4.12 3.38 26 Unit V V V mA VCC = 5.0V VCC = 5.0V Condition
IGND Power Supply Current 1. Levels will vary 1:1 with VCC.
MOTOROLA
4-2
ECLinPS and ECLinPS Lite DL140 -- Rev 3
MC100LVEL90 MC100EL90
MC100LVEL90 AC CHARACTERISTICS (VEE = -3.0V to -3.8V; VCC = 3.0V to 3.8V)
-40C Symbol tPLH tPHL tSKEW Characteristic Propagation Delay D to Q Diff S.E. Min 390 340 20 25 150 See4 230 -0.4 500 150 See4 230 -0.4 500 Typ Max 590 640 100 200 Min 410 360 20 25 150 See4 230 -0.4 500 0C Typ Max 610 660 100 200 Min 420 370 20 25 150 See4 230 -0.4 500 25C Typ Max 620 670 100 200 Min 460 410 20 25 mV V ps 85C Typ Max 660 710 100 200 Unit ps ps
Skew Output-to-Output1 Part-to-Part (Diff)1 Duty Cycle (Diff)2 Minimum Input Swing3 Common Mode Range4 Output Rise/Fall Times Q (20% - 80%)
VPP VCMR tr tf 1. 2. 3. 4.
Skews are valid across specified voltage range, part-to-part skew is for a given temperature. Duty cycle skew is the difference between a TPLH and TPHL propagation delay through a device. Minimum input swing for which AC parameters guaranteed. The device has a DC gain of 40. The CMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPPmin and 1V. VCMRmin depends on VEE, VPP and temperature. At VPP < 500mV and -40C, VCMR is VEE +1.3V; and for 0-85C, VCMR is VEE +1.2V. At VPP 500mV and -40C, VCMR is VEE +1.5V; and for 0-85C, VCMR is VEE +1.4V.
MC100EL90 AC CHARACTERISTICS (VEE = -4.20V to -5.5V; VCC = 4.5V to 5.5V)
-40C Symbol tPLH tPHL tSKEW Characteristic Propagation Delay D to Q Diff S.E. Min 390 340 20 25 150 See4 230 -0.4 500 150 See4 230 -0.4 500 Typ Max 590 640 100 200 Min 410 360 20 25 150 See4 230 -0.4 500 0C Typ Max 610 660 100 200 Min 420 370 20 25 150 See4 230 -0.4 500 25C Typ Max 620 670 100 200 Min 460 410 20 25 mV V ps 85C Typ Max 660 710 100 200 Unit ps ps
Skew Output-to-Output1 Part-to-Part (Diff)1 Duty Cycle (Diff)2 Minimum Input Swing3 Common Mode Range4 Output Rise/Fall Times Q (20% - 80%)
VPP VCMR tr tf 1. 2. 3. 4.
Skews are valid across specified voltage range, part-to-part skew is for a given temperature. Duty cycle skew is the difference between a TPLH and TPHL propagation delay through a device. Minimum input swing for which AC parameters guaranteed. The device has a DC gain of 40. The CMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPPmin and 1V. VCMRmin depends on VEE, VPP and temperature. At VPP < 500mV and -40C, VCMR is VEE +1.3V; and for 0-85C, VCMR is VEE +1.2V. At VPP 500mV and -40C, VCMR is VEE +1.5V; and for 0-85C, VCMR is VEE +1.4V.
ECLinPS and ECLinPS Lite DL140 -- Rev 3
4-3
MOTOROLA
MC100LVEL90 MC100EL90
OUTLINE DIMENSIONS
DW SUFFIX PLASTIC SOIC PACKAGE CASE 751D-04 ISSUE E
-A -
20 11 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.150 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF D DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A B C D F G J K M P R MILLIMETERS MIN MAX 12.65 12.95 7.40 7.60 2.35 2.65 0.35 0.49 0.50 0.90 1.27 BSC 0.25 0.32 0.10 0.25 0 7 10.05 10.55 0.25 0.75 INCHES MIN MAX 0.499 0.510 0.292 0.299 0.093 0.104 0.014 0.019 0.020 0.035 0.050 BSC 0.010 0.012 0.004 0.009 0 7 0.395 0.415 0.010 0.029
-B -
1 10
P 10 PL 0.010 (0.25)
M
B
M
D
20 PL
J
M
0.010 (0.25)
T
A
S
B
S
F R X 45 C -T G
18 PL SEATING - PLANE
K
M
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JAPAN: Nippon Motorola Ltd.; Tatsumi-SPD-JLDC, 6F Seibu-Butsuryu-Center, 3-14-2 Tatsumi Koto-Ku, Tokyo 135, Japan. 03-81-3521-8315 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852-26629298
MOTOROLA 4-4
*MC100LVEL90/D*
MC100LVEL90/D ECLinPS and ECLinPS Lite DL140 -- Rev 3

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